glo

Full Name
Virginia Lo
First Name
Virginia
Last Name
Lo
Affiliation
Emeritus
Title
Associate Professor Emerita
Phone
541-346-4473
Departments
Computer Science
Interests
Parallel and Distributed Computing, Networks
Profile Section
Education
  • BA, 1969, Michigan
  • MS, 1977, Pennsylvania State
  • PhD, 1983, Illinois at Urbana-Champaign
Biography
Virginia Lo received her Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 1983, her M.S. in Computer Science from the Pennsylvania State University in 1977, and her A.B. in Chinese Language and Literature from the University of Michigan in 1969. She has been on the faculty at the University of Oregon since 1985.
 
Her research has been funded by four grants from the National Science Foundation and a grant from the Oregon Advanced Computing Institute. She was also recipient of an IBM T.J. Watson Graduate Fellowship in Computer Science. She has served as an Associate Editor of IEEE Transactions on Parallel and Distributed Systems, on an NSF CISE MIPS Oversight Review Panel, as well as NSF CISE Infrastructure and Research Panels. She currently serves on the Program Committees for the Workshop on Large-Scale and Volatile Desktop Grids and the Workshop on Job Scheduling Strategies for Parallel Processing. Prof. Lo has also been supported by curriculum grants from NSF and Intel Corp.
Research Interests

Prof. Lo's research lies in the area of scheduling and resource management for parallel, distributed, and peer-to-peer systems. Her earlier work focused on the development of algorithms and tools for mapping parallel computations to regular parallel architectures, addressing task mapping, processor allocation, and I/O-sensitive scheduling. Her current work addresses the problem of resource management for peer-based desktop grid systems with a focus on resource discovery, scheduling and migration for faster throughput, result verification, and trust-based scheduling. In addition, she is looking at abstract scheduling models for multicore-based, hierarchical and heterogeneous architectures.

Updated

Member for

7 years 8 months